Microprocessor Cache Fault Injection for Studying Radiation-Induced Transient Faults
Open AccessRadiation in the upper atmosphere and outer space may cause transient faults in satellite and spacecraft microprocessors which manifest as “bit-flips.” These faults render an unprotected system unreliable, as even simple computations may be corrupted. This problem demands a holistic approach, from predicting radiation behavior in the design process, evaluating robustness during testing, and detecting and mitigating faults during operations.Traditional solutions such as radiation shielding, triplicated hardware, and specialized manufacturing processes were developed for multi-million dollar space missions and are correspondingly expensive. New space applications such as CubeSats are unable to take advantage of traditional solutions as such satellites have extremely restricted mass, volume, power, and monetary budgets. These missions have often turned to commodity processors that lack traditional protections to maintain budgets and suffer reliability issues as a result. A return to human spaceflight beyond low Earth orbit and continuing reductions in the cost of space access brought about by commercial launch providers will likely spur even greater demand for lower-cost radiation testing and mitigation solutions.This dissertation focuses on developing low-cost solutions based on widely available hardware. The ultimate goal is to increase the reliability of systems that are using commodity hardware in radiation environments such as low Earth orbit.We begin by addressing a gap in current fault injection frameworks used to evaluate the behavior of software under radiation induce faults: CPU caches. Short of exposing hardware to radiation sources, it is difficult to accurately simulate radiation-induced faults, which is especially true in processor components that lack direct access via hardware debugging ports, such as caches. Fault injection literature often ignores caches, despite caches being one of the largest sources of radiation-induced faults due to their large physical size and the persistence of data within them.This dissertation introduces cache profiling and fault injection tools to address the lack of techniques able to target caches for fault injection. The cache profiler tracks a program’s cache usage at an instruction granularity and provides an upper bound for cache fault vulnerability: the proportion of cache faults that result in failures such as program crashes or data corruption. The number of fault injections trials needed to measure cache fault vulnerability is reduced by applying this bound, lowering the time required for fault injection campaigns. For the benchmarks tested, we were able to reduce the number of required trials by at least two-thirds compared to fault injection approaches that have no prior knowledge of cache usage.The cache profiling tool provides the foundation for performing injections of simulated cache faults. We have modified an existing fault injection framework to be able to target the caches of a microprocessor via the on-chip debugging interface. The tool can accurately simulate cache faults by using the cache profile to alter only the instructions that read from the cache line with the corrupted data. Using the cache profile eliminates the biases of prior on-chip debugger-based fault injection tools that could erroneously inject faults that would not occur naturally.A fault injection campaign with ten benchmark programs using the cache profiling and fault injection tools shows that the data from the cache profile provides a much tighter bound on the cache fault vulnerability than cache utilization alone. We ran a second campaign with a reduced number of trials for each benchmark to demonstrate applying the cache profile data to reducing the number of trials required to measure cache fault vulnerability. The results were within the predicted margin of error of the first campaign, despite taking less time to perform.Finally, we expand a fault mitigation technique, process-level redundancy, to support real-time applications and utilize a standardized operating system interface. The modular redundancy framework we developed is capable of detecting and recovering from faults within set time constraints, which makes it suitable for applications such as satellite control software, which often has real-time requirements. Our technique is software-only and mostly adheres to the POSIX system interface, which makes it portable and low cost (the software is open-source) and is thus suitable for missions using commodity hardware. The framework recovered correctly from the vast majority of transient faults during evaluation.All of this is accomplished via commonly available tools, open-source software, and widely adopted on-chip debugging interfaces. Our tools allow resource-constrained missions to better understand the radiation fault behavior of software workloads for their commodity hardware, make design decisions based on accurate information, and produce more reliable systems for radiation environments. As satellite deployment has become accessible (CubeSats are now routinely deployed by universities, private companies, and research groups), there will be a need for less expensive radiation evaluation. This work addresses a gap (cache coverage) using open-source tools.
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