Electronic Thesis/Dissertation
 

A SmartNIC-based Network Processing Framework for High Performance NFV Platforms

Open Access

Network function virtualization (NFV) is an architecture that uses virtualization technology to run a variety of network services as virtual middleboxes. Because of the explosive increase of cloud computing scale and number of users, it is becoming more and more important for the Network Function Virtualization (NFV) platforms to provide high performance, rapid development, and strong security guarantee simultaneously. However, state-of-art NFV providers are still struggling to meet these requirements. Current approaches either reserve more dedicated CPU cores or trade off isolation properties for better performance with zero-copy IO. The providers are suffering from two main challenges:1. high and unacceptable CPU cores cost when the network traffic grows; 2. potential threats from other users in the multi-tenant environment. As a result, it is urgent to provide essential security aspects for different tenants while maintaining high performance and rapid development. This thesis seeks the possibility to overcome these challenges with the use of programmable network interface cards (smartNICs). SmartNICs are the network interface cards with multi-core processors and can implement network traffic processing on them. The goal of this thesis is to enhance the NFV system architecture with strong isolation guarantees, minimize the performance trade-offs by offloading certain functionalities to the smart-NICs, provide hardware-level load balancing, and design programmable networks to support NFV’s auto-scaling. In this thesis, I will deeply investigate the challenges mentioned above, study the fundamental ideas of the smartNICs, and discover the solutions on the hardware level. My contribution will be done in three steps: 1. measure the performance and isolation tradeoffs; 2. enhance security aspects with smartNICs; 3. design a smartNIC-based load balancer and support NFV auto scaling.

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